Web13 Mar 2024 · #include "ufshcd-pltfrm.h" #define UFSHCD_DEFAULT_LANES_PER_DIRECTION 2 static int ufshcd_parse_reset_info(struct ufs_hba *hba) { int ret = 0; hba->core_reset = devm_reset_control_get(hba->dev, "core_reset"); if (IS_ERR(hba->core_reset)) { ret = PTR_ERR(hba->core_reset); dev_err(hba->dev, … Web*/ #ifndef UFSHCD_PLTFRM_H_ #define UFSHCD_PLTFRM_H_ #include #define UFS_PWM_MODE 1 #define UFS_HS_MODE 2 struct ufs_dev_params ... int …
Re: [PATCH v1 1/1] scsi: ufshcd: Properly set the device Icc Level
Web18 Oct 2024 · The obvious way still fails: Directly after what I did in AGX Xavier enable uartg/uart7 - #12 by philipps, I booted successfully with FDT set to … Webint ufshcd_pltfrm_init (struct platform_device * pdev, const struct ufs_hba_variant_ops * vops ); void ufshcd_pltfrm_shutdown ( struct platform_device * pdev ); property in lewes east sussex
[v3 01/14] scsi: ufs-qcom: add number of lanes per direction
Web* Re: [PATCH v3 2/3] scsi: ufs: ufshcd-pltfrm: constify pointed data 2024-06-13 10:06 ` [PATCH v3 2/3] scsi: ufs: ufshcd-pltfrm: constify pointed data Krzysztof Kozlowski @ … Web29 Jan 2024 · [ 3.879459] ufshcd_pltfrm_init+0x3c8/0x550 [ 3.883264] ufs_qcom_probe+0x24/0x60 [ 3.887188] platform_drv_probe+0x50/0xa0 Assuming aligned 32-bit registers, let's use readl, after making sure that 'offset' and 'len' are indeed multiples of 4. Fixes: ba80917d9932d ("scsi: ufs: ufshcd_dump_regs to use memcpy_fromio") Cc: … Web* Re: [PATCH] scsi: ufs: ufshcd-pltfrm: simplify usages of pdev->dev 2024-04-01 8:50 ` [PATCH] scsi: ufs: ufshcd-pltfrm: simplify usages of pdev->dev Krzysztof Kozlowski 2024 … property in laxman jhula rishikesh